" Leave Your Foot On Earth.. "



186. Asha Kothari, Usha B. G, Lotiswar Borman Dr. P. Venkataratnam, “Implementation of BPSK and QPSK Modem using Kintex7 FPGA and AD9361/4 RF Transceiver Chip”, International Association of Engineering & Technology for Skill Development (IAETSD)17-12-2015.


185. Shwetha N, Nagaraj P, J V Narasimham, “Design & Implementation of Concatenated Turbo/LDPC Codes for Deep Space Communications”, International Conference and Electrical Engineering (ICIEEE) 26th July 2015.


184. Favoureen Swer, Pradeep S V, Dr. Siva S Yellampalli, “Analog BIST Capacitive MEMS Sensor using PLL”, International Symposium on Women in Computing and Informatics (WCI-2015) 10-13 August 2015.


183. Prakruthi T G, Dr. Siva S Yellampalli, “Design and Implementation of Sam [le and Hold Circuit in 180nm CMOS Technology”, International Conference on Advanced in Computing, Communication & Informatics 10-13 August 2015.


182. Bharathi S Kerakalamatti, Nagaraj P, “Design and Implementation of NOC based Parallel AES Computation”, National Conference on Power Systems and Industrial Automation (NCPSIA-2015).


181. Ashwini Hamilpurkar, Dr. Siva Yellampalli, “Design and Implementation of Jitter Free all Digital Phase Locked Loop in HDL”, International Conference on Communication and Computing -9-11-2015.


180. S. V. Pradeep, Favoureen Swer, Dr. Siva Yellampalli, “Design of Low Power, Low Dead Zone, High Frequency PFD for a PLL”, International Conference on Communication and Computing 9-11 July 2015.


179. Ravi Kiran N, Karthik A, G. Harish, Dr. Siva Yellampalli, “Low Power and Hardware Cost STUMPS BIST”, 19th International Symposium on VLSI Design and Test 26-29 2015.


178. Rithesh M, Bhargav Ram B V, G. Harish, Dr. Siva Yellampalli, “Detection and Analysis of Hardware Trojan using Scan Chain Method”, 19th International Symposium on VLSI Design and Test 26-29 2015.


177. Gowthami M R, Bhargav Ram B V, G. Harish, Dr. Siva Yellampalli, “Modified Low Power Scan Based Technique”, 19th International Symposium on VLSI Design and Test 26-29 2015.


176. Rashmi C, K V Ramana Reddy, Satish Paidi, Dr, Siva Yellampalli, “Implementation of VGA controller to display image using EDK”, International Conference on Communication and Computing, 9-11 July 2015.


175. M. Rithesh, Harish G and Dr. Siva Yellampalli, “Detection and Analysis of Hardware Trojan using Dummy Scan Flip-Flop”, International Conference on Smart Technologies and Management for Computing, Communication, Control, Energy and Materials, 6-8 May 2015.


174. N. Ravi Kiran, Rithesh M, Harish G and Dr. Siva Yellampalli, “Hardware Trojan Self-Detector”, International Conference on Smart Technologies and Management for Computing, Communication, Control, Energy and Materials, 6-8 May 2015.


173. B. V. Bhargav Ram N, Harish G and Dr. Siva Yellampalli, “Stepped Segment LFSR for Low Test Power BIST”, International Conference on Smart Technologies and Management for Computing, Communication, Control, Energy and Materials, 6-8 May 2015.


172. Gowthami M R, Ravi Kiran N, Harish G and Dr. Siva Yellampalli, “Test Power Aware STUMP BIST”, International Conference on Smart Technologies and Management for Computing, Communication, Control, Energy and Materials, 6-8 May 2015.


171. Satya Shankaraiah G, Dr. Siva Yellampalli, “Android Based Fluid Dispensing and Blending System Automation”, International Conference on Computational Intellgence and Compuuting Research Held During December 2014.


170. Sunith Kumar V, Arun Patro, Dr. Siva Yellampalli, “Design of the PCI Master with LDPC Technique”, International Journal of Emerging Technology and Advanced Engineering, Vol. 5, Issue. 1, January 2015.


169. Karthik A, Dr. Siva Yellampalli, “Compartive Analysis of Various off – Chip Bus Encoding Technique”, International Conference on Computer Communication and Informatics 08-10 2015.


168. Mohammed Musab, Dr. Siva Yellampalli, “Study and Implementation of Multi-VDD Power Reduction Technique”, International Conference on Computer Communication and Informatics 08-10 2015.


167. Sawthi S, Arun Patro, “Design of a Novel Counter Based NCO”, International Journal of Innovative Research in Computer and Communication Engineering (IJIRCCE) Vol. 3, Issue. 10, October 2015.


167. Ravi Kiran N, Dr. Siva Yellampalli, “Low Hardware Cost Stumps BIST”, International conference on Circuits, Communication, Control and Computing I4C2014, November 21-22, 2014.


166. Ranjith N, Nagaraj P, Dr. Siva Yellampalli, “Automation system for Stator winding thermal monitoring of AC Motor using Android”, ISRASE First International Conference on Recent Advanced in Science & Engineering 2014.


165. Lavanya P, Leelavathi G, Dr. Siva S Yellampalli, “FPGA Implementation of Elliptic Curve Cryptography”, International Journal of Advanced Research in Science and Engineering (IJARSE), Vol. No. 03 Issue No. 12, December 2014.


164. Vidya Priyadarshini. P, Leelavathi. G, Dr. Siva S Yellampalli, “Subcut Aneous Vein Detection using Embedded Linux ARM”, International Journal of Advanced Technology in Engineering and science Vol. 11, Issue. 11 November 2014.


163. Kavyashree P, Dr. Siva S Yellampalli, “The Design of Ultra Power CMOS CGLNA in Nanometer Technology”, Fifth international symposium on Electronic System Design 2014.


162. Bhavya H R, Nagaraj P, Channaya, Dr. Siva S Yellampalli, “LMS and RLS Based Interference Cancellation in Uniform Array System”, ISOR Journal of VLSI and Signal Processing (ISOR-JVSP) VOl. 4, Issue. 6 Ver: II, Nov- Dec 2014.


161. Salman Khan B R, Arun Patro, Siva S Yellampalli, “Design of UART Protocol with Interrupt Logic and Status Register”, International Journal of Innovative Technology and Exploring Engineering (IJITEE), ISSN: 2278- 3075, Vol. 4, Issue. 7 December 2014.


160. Theodore Jesudas E Dandin Ramana Reddy, Dr. Siva Yellampalli, “Image Authentication by Watermarking Technique using System Generator Architecture”, International Journal of Engineering Research & Technology (IJERT), ISSN: 2278-0181, Vol. 3, Issue. 11, November 2014.


159. Jamuna G, Dr. Siva S Yellampalli, “Design and Implementation of Telescopic OTA in 8 Bit Second-Order Continuous- Time Band-Pass Sigma-Delta ADC”, International Conference on Electronics, Communication and Computational Engineering – ICECCE 2014.


158. Shashidhara HB, Dr. Siva S Yellampalli, “Board Level JTAG/Boundary Scan Test Solution”, International Conference on Circuits, Communication, Control and Computing- 14C2014, November 22-22, 2014.


157. Ashwini C, Leelavathi G, Dr. Siva S Yellampalli, “Design and Implementation of Selective Information Retrieval from Stego Encrypted Image”, International Journal of Advanced Research in Science and Engineering IJARSE, Vol. No. 3, Issue No. 10 October 2014.


156. Praveen Sakrappanavar, Siva Yellampalli, G Harish, “Comparative Analysis of Scan Compression Techniques”, 2014 ICECCE International Conference on 17-18th November 2014.


155. Nayana M, Siva Yellampalli, G Harish, “Modified Low Power STUMPS Architecture”, 2014 ICECCE International Conference on 17-18th November 2014.


154. S Praveen, Siva Yellampalli, G Harish, “Optimization of Test Time and Fault Grading of Functional Test Vectors using Fault Simulation Flow”, 2014 ICECCE International Conference on 17-18th November 2014.


153. Sunita Arvind Rathod, Siva Yellampalli, “Design of Fifth Order Elliptic Filter With signal-Opamp Resonator”, 2014 International Conference on Advanced in Electronics, Computers and Communications (ICAECC), on 10-11 October 2014.


152. Sunita Arvind Rathod, Siva Yellampalli, “Design of Op-amp, Comparator and D Flip Flop for Fifth Order Continuous-Time Sigma-Delta Modulator”, International Journal of Innovative Technology and Exploring engineering (IJITEE), ISSN: 2278-3075, Volume-4, Issue-2, July 2014.


151. Lavanya K B, K V Ramana Reddy, Dr. Siva S Yellampalli, “Comparative Analysis of Different Optimization Techniques for Sobel Edge Detection on FPGA”, 2014 International Conference on Advanced in Electronics, Computers and Communications (ICAECC), on 10-11th October 2014.


150. S. Praveen, G. Harish, Siva Yellampalli, “Effective ATPG Flow for Optimization of Test Time and Fault Coverage”, International Conference on Advanced trends in VLSI & Signal Processing, August13-14, 2014.


149. Arpitha H N, G. Harish, Siva Yellampalli, “Analysis of Test Overhead in Boundary Scan Architecture”, International Conference on Advanced trends in VLSI & Signal Processing, August13-14, 2014.


148. Praveen Sakrappanavar, G. Harish, Siva Yellampalli, “Scan Compression and Area Optimization for Homogeneous Multi-Core Designs”, International Conference on Advanced trends in VLSI & Signal Processing, on 13-14th August 2014.


147. Shilpa Patil , G. Harish, Siva Yellampalli, “Comparative Analysis of Different LFSR Architectures ”, International Conference on Advanced trends in VLSI & Signal Processing, on 13-14th August 2014.


146. Nayana M, G. Harish, Siva Yellampalli, “Comparative Analysis of BIST Architectures”, International Conference on Advanced trends in VLSI & Signal Processing, on 13-14th August 2014.


145. Sharanabasppa J K, K. V. Ramana Reddy, “Design and Implementation of Fuel flow Control Unit for Aero Engine”, International Journal of Management, Information Technology and Engineering, ISSN: 2348-0513, Vol. 2, Issue. 8, August 2014.


144. Risma Rajan, V. Venkateswarlu, “Implementation of Linux based UART Device Driver”, International Journal of Research in Engineering and Technology, ISSN: 2319-1163, Vol. 03, Issue. 07 July 2014.


143. Jamuna G, Siva S Yellampalli, “Design and Analysis of CMOS Telescope OTA for 180nn Technology,” International Journal of Engineering Sciences Paradigms and Researches (IJESPR) ISSN 2319- 6564 Vol. 15, Issue. 01 July 2014


142. Lavanya K B, K V Ramana Reddy & Siva S Yellampalli, “Implementation of the Sobel Edge Detection Algorithm,” International Journal of Management Information Technology and Engineering (IJMITE) ISSN 2348- 0513 Vol. 2, Issue. 7 July 2014.


141. Priyanka A P, Mr. Channabasappa Baligar, “Airborne radar clutter simulation using GPU (CUDA)”, International Journal of Application or Innovation in Engineering & Management ISSN2319- 4847 Vol. 3, Issue. 5 May 2014.


140. Madhusudana Rao Kothari, Sree Lakshmi Ele, “Connecting Multiple Satellites STB Receivers through Single Antenna”, International Journal for Advance Research in Engineering and Technology ISSN 2320-6802 Vol. 2, Issue. 4 April 2014.


139. Sree Lakshmi Ele, Madhusudana Rao Kothari, “6LoWPAN Based Wireless Sensor Network to Monitor Temperature”, International Journal of Advanced Electronics and Communication engineering 2014, Volume 1, Issue 1


138. Gurusiddamma Manasur, V Venkateswalu, “Beamforming Using Linear Constraint Minimum Variance (LCMV) Algorithm” 7th IETE Conference on RF & Wireless Icon RFW-14, 8-10 May 2014.


137. Neela A G, Channabasappa Baligar, “Fault Tolerant Operation in Aero Engine Using Distributed Computation System” International Journal of Technological Exploration and Learning (IJTEL), ISSN: 2319-2135, Vol-3, Issue-2, April 2014.


136. Chetan Patil, Channabasappa Baligar, “Base Transceiver Station (BTS) Safety and Fault Management” International Journal of Innovative Technology and Exploring Engineering (IJITEE), ISSN: 2278-3075, Volume-3, Issue-7 December 2013.

135. Rakhesh Kusagur, Leelavathi G, “Hardware Implementation of Involutional SPN Block Ciphers”, International Journal of Engineering and Advanced Technology (IJEAT), ISSN: 2249-8958, Volume-10, Issue- 10, October 2013.


134. Kushal M L, Dr. V. Venkateswarlu, “Design and Implementation of Using PLL for Polar Transmitter,” International Journal of Inventive Engineering and Sciences (IJIES), ISSN: 2319-9598, Volume-1, Issue-12, November 2013.


133. Harish P, Dr. V. Venkateswarlu, “Design and Motion Planning of Indoor Pipeline Inspection Robot,” International Journal of Innovative Technology and Exploring Engineering (IJITEE), ISSN: 2278-3075, Volume-3, Issue-7, December 2013.


132. Mahesh Bilagi, Manjunath Lakkannavar, “Microcontroller Based Direct Digital synthesizer and FSK Modulator”, International Journal of Engineering and Advanced Technology (IJEAT), ISSN: 2249-8958, Volume-3, Issue-1, October 2013.


131. T. K. Abdul Quidir, Dr. V. Venkateswarlu, “Design and Implementation of Envelope Amplifier and Power Amplifier for Envelop Tracking in polar Transmitters” International Journal of Engineering and Advanced Technology (IJEAT), ISSN: 2249-8958, Volume- 3, Issue- 1


130. Vanishree, K.V. Ramana Reddy, “Implementation of Pipelined Sobel Edge Detection Algorithm on FPGA for High Speed Applications”, International Conference Emerging Trends In communication Control Signal Processing & Computing Applications in IEEE.


129. Chaithra. N. M., K. V. Ramana Reddy, “Implementation of Canny Edge Detection Algorithm on FPGA and Displaying Image Through VGA Interface”, International Journal of Engineering and Advanced Technology (IJEAT), ISSN: 2249-8958, Volume-2, Issue-6, August 2013.


128. Murlidhara R, Siva Yellampalli, “VIP Architecture and Design Using OVM for IrDA Protocol”, International Journal of Engineering and Advanced Technology (IJEAT), ISSN: 2249-8958, Volume-2, Issue-6, August 2013.


127. Padmini. K, Leelavathi. G, “Design and Implementation of Efficient Embedded Cryptography Algorithm using FPGA”, International Journal of Advanced computer Technology (IJACT), ISSN: 2319-7900, Volume-2, Issue-4


126. Sagara Deshpande, Leelavathi G., “Design and Implementation of Extended Version of AES Algorithm with DSP Units”, International Journal of Engineering and Advanced Technology (IJEAT), ISSN: 2249-8958, Volume-2, Issue-6, August 2013.


125. Chetan T. R, V. Venkateswarlu, “GSM Based Hardware Implementation of RFID Authentication System Using Actel FPGA”, International Journal of engineering and Advanced Technology (IJEAT), ISSN: 2249-8958, Volume-2, Issue-6, August 2013.


124. Revnasiddappa B, K. V. Ramana Reddy, “CPLD Implementation of Low Power serial to Ethernet Gateway for UAV Data Acquisition Systems by Using PIC”, International Journal of Science and Modern Engineering (IJISME) ISSN: 2319-6386, Volume-1, Issue-9, August 2013.


123. K. Harika, K. V. Ramana Reddy, “Design and Implementation of Arithmetic Coder Used in SPIHT”, International Journal of Innovative Technology and Exploring Engineering (IJITEE) IISN: 2278-3075, Volume-3, Issue-3, August 2013.


122. Bibin M C, B S Premananda, “Implementation of UART with BIST Technique in FPGA”, International Journal of Engineering and Sciences (IJIES), ISSN: 2319-9598, Volume-1, Issue-8 July2013.


121. Mahendra Kumar Verma, B S Premananda, “FPGA Implementation for Generation of Six Phase Pulse Compression Sequences”, 4th IEEE International Conference on Computing Communication and Networking Technologies (ICCCNT 2013) held during 4th to 6th July, 2013.


120. Aswath M, B S Premananda, “Signal Fixed-Point Multiplier for DSP using Vertically and Crosswise algorithm”, 4th IEEE International Conference on Computing Communication and Networking Technologies (ICCCNT 2013) held during 4th to 6th July, 2013.


119. S. Janaki, Dr. Siva Yellampalli, “Design and Implementation of Impulse Distributed Waveform Generator Time Interleaved Impulse Generator”, International Journal of Innovative and Exploring Engineering (IJITEE) ISSN: 2278-3075, Volume-3, Issue-1, JUNE 2013.


118. S. Janaki, Dr. Siva Yellampalli, “Design of Impulse Distributed Waveform Generator” 4th IEEE International Conference on Computing Communication and Networking Technologies (ICCCNT 2013) held during 4th to 6th July, 2013.


117. Anupa. K, Channabasappa Baligar, “Real Time communication between Aero Gas Turbine Engine Controller and Pilot Online Monitoring System”, International Journal of Engineering and Advanced Technology (IJEAT) ISSN: 2249-8958, Volume- 2, Issue-5, June-2013.


116. Nagaraj P, Dr. Siva Yellampalli, “8 Bit Second-Order Continuous-Time Band- Pass Sigma-Delta ADC”, International Journal of Innovative Technology and Exploring Engineering (IITEE) ISSN: 2278-3075, Volume-3, Issue-1, June- 2013.


115. M. G. Anuradha, R. Arun Kumar, Dr. Siva S. Yellamoalli, “VLSI Implementation of Multi-dimensional K-Means Clustering Algorithm for Multimedia Content Analysis”, Proceeding of the International Conference on Pattern Recognition Applications and Techniques, March 2013 ISBN: 978-1-25-905849-3.


114. Abhay A D, Ganesh Krishna, Channabasappa Baligar. “Smart Card Reader Meeting ISO 7816-3 and EMV Level 1 Specifications Using PIC24F Microcontroller”, International Journal of Innovative Technology and Exploring Engineering (IJITEE) ISSN: 2278-2278-3075, Volume-X, Issue-X.


113. Shrinivas K Saptalakar, Manjunath Lakkannavar, “Design and Analysis of 8 -bit Low Power Parallel Prefix VLSI Adder”, International Journal of Recent Technology and Engineering (IJRTE) ISSN: 2277-3878, Volume-2, Issue-1, March 2013.


112. Manjunath Managuli, Dr. V. Venkateswarlu. “Building Automation with Zigbee using Antilock Security System”, National Conference on “Emerging Trends in Electronics, Communication and Computational Intelligence-ETEC 2013.


111. Sathyanarayana. R, “Integrated random Noise Source Using 45 nm VLSI Technology”, The International Journal of Engineering and Science (IJES), Volume-2, Issue-1, Jan 2013.


110. Srikanth Leelavathi. G “Video Monitoring System based on ARM9”, International Journal of Innovative technology and Exploring Engineering vol-X, Issue-X.

109. Manjunatha R Bhat, Prof Sudheendra j, and Mohammed Tanvee, “Geo Fencing using GPS and GSM /GPRS Wireless Communication System”, International Conference on electronics and communication engineering.


108. Srinivasa, Dr. V. Venkateswarlu, “Study of reversible Binary Arithmetic Circuits based on new reversible Gate”, International Journal of Electronics research (IJEER).


107. Hemanth Kumar G, Mr. Manjunath Lakkannavar “The Design of Granary Environmental Monitoring and control system based on ARM9 and ZigBee”, National Conference ISSN2278-3075 Volume-X Issue-X.


106. Mrs. Vyjayanthi A S, Mr. Channabasappa Baligar, “Wireless battery Charger (RF/Microwave to DC conversion)”, International conference on Advanced computer Engineering and applications on 28th October 2012.


105. Anand. T, Sundeep B. A, Dr. Siva S Yellampalli, “VLSI Implementation of STM-1 Framer and De- Framer”, International Conference on Advanced Communication, Control And Computing Technologies on August 23-25 2012.


104. Mr. Siddalinga Aland, Dr. V. Venkateswarlu and Mr. Rohith B. R, “Block level physical design of interfacing Module in RISC Core”, International Journal of Innovative Technology and Exploring Engineering on August 10th 2012.


103. RoopaShree S. S, Mr. Manjunath Lakkanavar, “The controlling of Mobile Robot based on ARM9”, International journal of Innovative Technology and Exploring Engineering, on 10 Aug, 2012.


102. NandaKishore Holla, Premananda B. S, “Design of FPGA based Controller &tester for network Interface module in fligh Definition Receivers”, Conference National Conference on Department of Electronics and Communication Engineering held on 3 -4 Aug 2012(BMSCE) on Networking Embedded and Wireless Systems, NEWS 2012.


101. Anand. T, Dr. Siva S Yellampalli, “ASIC Implementation of STM -1 framer And De-framer”, IOSR journal of Computer Engineering Volume-2 Issue-2, July-Aug 2012.


100. Konda Vijayasree, Dr.Siva S Yellampalli, “Design and Implementation of E1 to STM-1 Frame and Deframe”, International Journal of Innovative Technology and Exploring Engineering Volume-1, Issue-2, July2012.


99. Pooja Mustapure, Mrs. Leelavathi G, and Mr. Jayaprada S Hire math, “Multi Channel Support for MP3”, International Journal of Scientific &Engineering research, Volume-7, Issue-7, July2012.


98. Nookaraju Raparti, Dr. V. Venkateswarlu and S.V. Hariprasad, “Development of FPGA based Enhanced DATA rate For GSM Evolution (EDGE) Modulator”, National Conference on Advances in Computer sciences, Communication and Information Technologies at JNU, New Delhi-ACSCIT on 28th July 2012.


97. Pradeep Kumar, Mr.Manjunath Lakkannavar, “A VLSI Implementation of Linear and Non Linear Image Filtering Using FPGA”, International Conference on Current trends in Engineering and management.(ICCTEM-2012) 12-14-July 2012,


96. Padamavathi, Dr. Siva S Yellampalli and Arun Kumar, “Adaptable Buffer for Network on Chip On FPGA with Priority Encoder”, International Conference on information Technology Electronics Communications (ICITEC-2012), July 14th -15th 2012 Hyderabad, (IAIRS).


95. Shivasharanappa Biradar, Dr. Siva S Yellampalli, “Design of 1.8GHz Quadrature VCO Design for Zero-IF GSM Receiver in 0.18µm Technology”, International Conference on Current Trends in Engineering and Management on July 12-14, 2012.


94. Mrs. Chinmayi, Dr. Siva S Yellampalli, “Fully Integrated High Efficiency DC-DC buck Converter”, International Conference on Current trends in Engineering &Management (ICCTEM) 2012 held at Mysore on July 12-14 2012.


93. Shilpa. M .B, Channabasappa Baligar, “Implementation of Multichannel Temperature Acquisition and Monitoring System based on ARM 7 and CAN bus”, International Conference on Current Trends in Engineering & Management ICCTEM-2012 on July 12th -14th, 2012.


92. Ramshanker, Basavalinga Swamy, Dr. V Venkateswarlu, Mr. Manjunath lakkannavar, and Dr. Siva S Yellampalli, “Design of a low Output Offset Voltage CMOS OpAmp”, International Conference on Electrical Engineering (ICEEE) held at Mysore on 30th of June 2012.


91. N. Mohansundaram, Mr. Sudheendra, and Mr. H. R. Shashidhara, “Vision based Automatic Parking System”, National Conference on Recent Advances in Electronics & Communication Engineering on May 2012.


90. Mrs. S. B. Rashmi, Dr. Siva S. Yellampalli, “Design of phase frequency detector and charge Pump for high frequency PLL”, International journal of soft computing and engineering ISSN: 2231-Volume 2, issue 2, May 2012.


89. Mahendra M N, Prof. Sudheendra. J and Mr. Shreyem, “Intelligent window based on Embedded”, National conference on Recent Advances in Electronic & communication. Presented at New Horizon College of engineering on 18th May 2012.


88. Nagesh Kumar D.N, Mr. Ramesh T, “Remote monitoring and control System for Environmental Parameters in Greenhouse”, National Conference on Recent advances in Electronics & Communication, New Horizon College of Engineering on 18th May 2012.


87. Sathyanarayana R, “Integrated random Noise Source Using 90 nm VLSI Technology”, IRNet. International Joint Conference on Emerging Intelligent sustainable technologies Bangalore on 3rd -4th May 2012.


86. G.C Veeresh, Mr. Ramesh T and Dr. Siva Yellampalli, “Design of low power 7.5 GHZ phase locked loop with four multiple output in 45nm CMOS Technology”, International conference on computing communications systems & Aeronautics on March 30th -31st 2012.


85. Leena Chandrashekar, Leelavathi G, “Multi Sensor Data for Robot Application”, International Conference on Recent Advances in Computer Sciences- ICRAS2K12, March 30th -31st 2012.


84. G. C Veeresh, Mahesha M. S “VLSI Implementation of Distributed Arithmetic on FPGA”, First International Conference on Advances in Communication and Computing (ICCAC 2012), Jan 9th -10th 2012.


83. Ravichandru B. S, Dr. Siva Yellampalli and Harish Bhatt, “Implementation of Ethernet Controller with Integrated Security Engines to Enable Fast and Secure Embedded Connectivity”, First International Conference on Advances in Communication and Computing (ICCAC 2012), Jan 9th -10th, 2012.


82. Sathyanrayana R. “Integrated Random noise source using 90 nm VLSI Technology” presented at IRNet International Joint Conference on Emerging Intelligent Sustainable Technologies EISTCON 2012,Bangalore.


81. Sophiya, Dr.Siva S yellampalli “Design and Implementation of high speed LC- VCO in 0.18 um CMOS Technology”, TENCON 2011, pp. 1230-1234, November 21-24, 2011.


80. G.C Veeresh ,Ramesh.T, Dr.Siva S yellampalli “Design of low power 7.5G Phase locked loop with four multiple output in 45nm CMOS Technology”.at International Conference on Computing,Communications,Systems and Applications (ICCCSA-12),March 30-31,20121.


79. Leena Chandrashekar, Leelavathi.G. “Multi Sensor Data Fusion for Robotic Application”.International Conference on Recent Advances in Computer Sciences –ICRACS2K12 Mar 30-31,2012.


78. J. Sudha, M.C.Hanumantnar on VLSI/ VHDL conducted at Sree Veerendra Patil Degree College of Science, Arts & Commerce, Bangalore on 29th & 30th of January 2010.


9. Ibrar Jahan M A, “Design of 1GHz Voltage Controlled Ring Oscillator for Frequency Synthesizer Using 0.18 micron Technology”, seminar given at BSK Information Technologies India Pvt. Ltd., on 6th June 2009.


8. Javeed Ahmed Shariff M, “Design of High Speed 4-Bit Flash ADC Using 0.18 micron Technology”, seminar given at BSK Information Technologies India Ltd., on 6th June 2009.


7. Karthik R, Premananda B S, Benoy Kuriakose, “Design and Implementation of Active Phased Array Radar”, Annual Inter Collegiate Techno Cultural Fest “ANAADYANTA – 09” held on 3rd and 4th of April 2009.

6. Prameela Kumari, Premananda B S, Ramesh, “Design and Implementation of Hamming EDAC”, Annual Inter Collegiate Techno Cultural Fest “Techno Vision – 2009” – Applied Electronics held on 25th of June 2009.


5. Prashant V Joshi, Jayabrata Chakraborthy, “Implementation of Jamming Analysis on PMC FPGA 05 VMETRO Using XF HDK 1.0 R1 Library”, Annual Inter Collegiate Techno Cultural Fest”, Techno Vision – 2009” – Applied Electronics held on 25th June 2009.



4. Deepthi Prakash, Dr. V Venkateswarlu, U S Pandey, “Implementation of Digital Beam Forming for Phased Array Radar on FPGA”, IMPULSE – 09 conducted by VVCE – IEEE student branch, held on 7th May to 9th May 2009.


3. Suma P, “Design and Implementation of LFM Waveform Using DDS and FPGA”, IMPULSE – 09 conducted by VVCE – IEEE student branch, Mysore and held from 7th May to 9th May 2009.


2. Kiran Gupta, D V Poornaiah, Dr. V Venkateswarlu, “VLSI Implementation of Crypto processor Arithmetic Unit Using Galois Field (2M) for Secured Communications” Proc. International Conference on RF and Signal Processing Systems – RSPS – 2008, Jointly conducted by KLCE, Vijayawada and IEEE, page no. 308 – 313, August 2008

1. Zameer Ahmed, “Complex Rectilinear Floor Plan and Implementation of Multi Voltage Domain, Low Power ASIC’s”, SN Users Groups, Boston 2007.

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Highlights of 2015 :

Sl No.
1 Patents :

a. Enhanced NIM with Trans modulation and Trans receiver Capabilities

b. A Blending System Controlled by a Mobile Device

02
2 Book Chapters :

a. Book Name: Design and Modelling of Low Power VLSI Systems Chapter Name: The Design of Ultra Low Power RF CMOS LNA in Nanometer Technology

b. Book Name: Handbook of Research on Advanced Trends in Microwave and Communication Engineering Chapter Name: Review on 60GHz Low Noise Amplifier for Low power and Linearity

02
3 International Journals Papers:
03
4 International Conferences Papers :
30
5 National conference Papers :
01

Design Competition:

  1. Two of our projects are finalists in Cadence Design contest 2015 among 4.

  2. Eight of our projects got selected for INUP (Indian Nano Electronics User Programme) conducted by IISC-Bangalore, For using the fabrication facilities and training from IISC to implement our projects.

  3. Project titled “Home energy manager” is selected under top 30 projects in “Next big idea challenge 2013” organized by Indian Institute of Management(IIM)-Bangalore.

  4. Project titled “Doof-Goof” is selected for funding in IBETO 2015 conducted by Govt engineering college, Kochin with association with Govt. of Kerala.

  5. Project titled “Medi-rings for senior citizens” is received grant from IEEE AIEYHUM (Humanitarian contest) 2014-Asia pacific R10 region.

Paper Presentation :

  1. Research papers titled “Comparative analysis of off-chip bus encoding schemes” and “Study and implementation of Multi-VDD power reduction technique” selected as winner and runner in BRV Vardhan contest 2014 organized by IEEE Bangalore chapter, BMS institute of technology, Bangalore.

  2. Paper titled “Low hardware cost STUMPS BIST” is selected as best paper in IEEE international conference on Circuits, Communication, Control and Computing organized M S Ramaiah institute of technology, Bangalore.

  3. Paper titled “Comparative analysis of compaction techniques in BIST” won best paper award in IEEE national conference on in electrical and electronics engineering 2014, HKBK College of engineering, Bangalore.

Paper Presentation :

  1. Research papers titled “Comparative analysis of off-chip bus encoding schemes” and “Study and implementation of Multi-VDD power reduction technique” selected as winner and runner in BRV Vardhan contest 2014 organized by IEEE Bangalore chapter, BMS institute of technology, Bangalore.

  2. Paper titled “Low hardware cost STUMPS BIST” is selected as best paper in IEEE international conference on Circuits, Communication, Control and Computing organized M S Ramaiah institute of technology, Bangalore.

  3. Paper titled “Comparative analysis of compaction techniques in BIST” won best paper award in IEEE national conference on in electrical and electronics engineering 2014, HKBK College of engineering, Bangalore.

MOU's :

  1. TSMC
  2. UMC
  3. Sensesemi

Details of VLSI Batch

Internship
Sl.No Name Internship Organization
1 Priya K Managundi ORCA Systems
2 Lingareddyappa Upral Vijay Technologies
3 Sushma N V 4Semi Technology India Pvt. Ltd.
4 Sagar S Karakalmani Pragmatic Embd Solutions
5 Milchah V Thomas Bharat Electronics
6 Afreen Mohsin 4Semi Technology India Pvt. Ltd.
7 Neeraja A R ISRO Satellite Centre
8 Prajwal N Bharat Electronics
9 Murulidhara T C BHEL
10 Monika B K BEL, Jalahalli
11 Pompa Reddy T 4SEMI Technology Ind Pvt Ltd
12 Ahemadali TATA Power SED
13 Annapurneshwari J TATA POWER SED
14 Ashwini R BEL, Jalahalli
15 Pompa Reddy T 4SEMI Technology Ind Pvt Ltd
16 Nischitha T N EMBO Softtech
17 Savitri Basappa Jambagi TATA Power SED
18 Supreetha R Murthy Bharat Heavy Electricals Ltd
19 Ashwini L Kanth Smile Electronics

Details of Digital Electronics Batch

Internship
Sl.No Name Internship Organization
1 Madhavi P 4Semi Technology India Pvt. Ltd.
2 Shwetha K V 4Semi Technology India Pvt. Ltd.
3 Amaresh Halemani Pragmatic Embd Solutions
4 Santhosh R Robert Bosch
5 Vandana Roselin KNOUX Innovation Pvt Ltd
6 Mangala P Yatishettar KNOUX Innovation Pvt Ltd

Details of VLSI Batch

Sl.No Name Internship Current Working Place
1 Anish A IMSPIRED Black Pepper Technologies Pvt Ltd.
2 Bhavana N IMPSPIRED Graphene Semiconductor Pvt Ltd
3 Bibi Hajira UTL Shaikh College of Engineering & Technology
4 Manjunath D UTL National Aerospace Laboratories (NAL).
5 Basawaraj P G UTL Eximius Design
6 Ishwar Malapur UTL Continental Components India Pvt Ltd

Details of Digital Electronics Batch

Sl.No Name Internship Current Working Place
1 Abhilash C N UTL The Competition Explorer Training Institute.
2 Abhinav Ranjan UTL The Competition Explorer Training Institute.
3 Praveen Kumar N UTL White clarke India Pvt Ltd.
4 Kruthika UTL Stellapps Technologies Ltd.

Alumni Details of VLSI Batch

Sl.No Name Internship Current Working Place
1 BHARGAV RAM IMSPIRED ULTRAN TECHNOLOGIES LTD.
2 FAVOUREEN SWER IMPSPIRED POWER CORPORATION LTD.
3 GOWTHAMI M R UTL INTEL INDIA PVT LTD
4 JAGADEESH R J UTL PRAGMATIC EMBD SOLUTIONS
5 KARTHIK A IMSPIRED DXCORR HARDWARE
6 PRADEEP S V CDAC UTL TECHNOLOGIES LTD
7 PRIYA D S UTL PESIT
8 RAVI KIRAN N IMPSPIRED INTEL INDIA PVT LTD
9 RITHESH M IMSPIRED IMSPIRED SOLUTIONS
10 SHRUTHI A B UTL OPEL DIGI CONSULTING PVT LTD
11 SHRUTI UTL LOGIC FRUIT TECHNOLOGIES
12 VIBHA H BOSCH ROBERT BOSCH

Alumni Details of Digital Electronics Batch

Sl.No Name Internship Current Working Place
1 AMARESHA SHIVAPPA KHASABAG CDAC UTL TECHNOLOGIES LTD.
2 ANUSHA C UTL LIVE WIRE PVT LTD.
3 RASHMI C UTL SAPTAGIRI COLLEGE
4 SHALINI B IMSPIRED LIVE WIRE PVT LTD.
5 SPANDANA UTL SOLAR APPS ENERGY PVT LTD.
6 VASUDEVA UTL UTL TECHNOLOGIES LTD
7 NANDA HANAMANT KHANAPUR UTL DELPHI

2011-2012 Batch

Sl.No Name Current Working Place
1 ARPITHA H N Dayanad Sagar College
2 DEEPA UMAJI PATIL MMEC
3 KAVYASHREE P Shri Pillappa College of Engineering
4 NAYANA M UTL Technologies Ltd
5 PRASAD HOTTI UTL Technologies Ltd
6 PRAVEEN SAKRAPPANAVAR iMspired
7 RANI K B BESIT
8 RANJITH N iMspired
9 S PRAVEEN RVCE
10 SALMAN KHAN B R Accenture
11 JAMUNA Benaka Technologies
12 NILA A G Software Enginer, HASHTAAG
13 AMARANATHA S Mysore University
14 ANUPA K IBM Pvt Ltd
15 CHETHAN J TESLOVE
16 CHETHAN T R VIT
17 HARIKA K RAJIV GANDI INT OF TEC
18 HARISH P TCS
19 MAHESH BILAGI BUSINESS
20 MANJUNATH G KIT
21 NAGARAJ P QUALCOMM
21 RAKHESH KUSAGUR THIMMYA INST TEC
22 REVANASIDDAPPA B BUSINESS
23 SHRINIVAS SAPTALAKAR WIPRO
24 T K ABDUL QADIR GERMANY, FELLOWSHIP

2010-2011 Batch

Sl.No Name Current Working Place
1 Anand T Applied Devices
2 G C Veeresh Synopsis
3 Meshram Vaibhav Bhimrao HCL
4 Sathyanarayana R Mysore University
5 Shilpa M B AIET
6 Siddaling Aland Xilinx
7 Basavalinga Swmy Appa Institute of Technology
8 Hemanth Kumar G GSSIT
9 Mohammed Khaleeluddin Logic Fruit Technologies
10 Pradeep Kumar S SIR MVIT
11 Ramshanker N IISC
12 Shivasharanapp BNMIT
13 Imran Khan Brindavan College of Engineering

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(080) 234-72171
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